Dr. Harish Krishnaswamy
Efficient generation of power at mm-Wave and sub-mmWave frequencies in CMOS is a fundamental challenge. Operation at mmWave frequencies requires the use of scaled CMOS technologies with low breakdown voltages, limiting output power in amplifiers. On-chip power combining techniques are either inefficient or cannot be scaled to the number of elements required to achieve watt-class output power. Efficiency in the individual power amplifiers themselves is limited by device and passive losses. Switching PA topologies may be employed, but are plagued by low PAE due to the high drive-levels required and deviation from ideal switching behavior due to the high frequency of operation. Consequently, an efficient, watt-class, mm-Wave CMOS amplifier has remained the stuff of science fiction.
Sub-mmWave frequencies, on the other hand, lie beyond the maximum operating frequencies of today's CMOS devices. Consequently, the generation of appreciable amounts of power at these frequencies requires creative circuits that can operate beyond the fmax of the technology being used.
In this presentation, we will cover recent advances at Columbia University towards the first fully-integrated, efficient, watt-class, mmWave SOI CMOS power amplifier. Aggressive stacking of SOI CMOS devices is pursued to increase the effective breakdown voltage and increase output power. A new analytical Class E design methodology has been devised that maximizes PAE in the presence of high device-loss levels. A new fully-integrated power combining technique has been implemented that enables power-combining of up to 16 elements with high combining efficiency. Measurement results from 45GHz PAs implemented in 65nm CMOS and 45nm SOI CMOS will be discussed.
For terahertz frequencies, a new Maximum-Gain Ring Oscillator topology is introduced that can oscillate at the fmax of the active devices in the absence of passive element losses. In the presence of passive losses, a formal design methodology is described that maximizes the frequency of oscillation. Techniques to maximize the power generated at harmonics of the MGRO oscillation frequency will also be discussed. Measurement results from terahertz oscillators implemented in 45nm SOI CMOS will be presented.
Harish Krishnaswamy received the B.Tech. degree in Electrical Engineering from the Indian Institute of Technology-Madras, India, in 2001, and the M.S. and Ph.D. degrees in Electrical Engineering from the University of Southern California (USC) in 2003 and 2009, respectively. He joined the EE department of Columbia University as an Assistant Professor in 2009.
His research group at Columbia, funded by various federal agencies, including NSF and DARPA, and industry, focuses on millimeter-wave CMOS power amplifiers and transmitters, sub-mmWave devices, circuits and systems in CMOS, broadband RF receivers for cognitive radio, and field-programmable, waveform-adaptive RF CMOS transmitters.
He received the IEEE International Solid State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper in 2007. He also received the Best Thesis in Experimental Research Award from the USC Viterbi School of Engineering in 2009, and the DARPA Young Faculty Award in 2011.