Area of expertise: VLSI Architectures for Signal Processing and Communications, Low-Power Signal Processing, Biomedical Signal Processing and Classification
Ph.D., 1988, University of California, Berkeley, CA, United States
M.S., EE, 1984, University of Pennsylvania, Philadelphia, PA, United States
B.Tech., 1982, Indian Institute of Technology, Kharagpur, India
Office: 6-181 Keller Hall
Telephone: (612) 624-4116
E-mail: parhi (at) umn.edu
Personal Web Site: http://www.ece.umn.edu/~parhi/
Editor-in-Chief, IEEE Trans. Circuits and Systems-I:Regular Papers, 2004-2005
ASEE Frederick Emmons Terman Award, 2004
IEEE Kiyo Tomiyasu Technical Field Award, 2003
IEEE W.R.G. Baker Prize Paper Award, 2001
IEEE Circuits and Systems Society Golden Jubilee Medal, 1999
Fellow, IEEE, 1996
National Science Foundation Young Investigator Award, 1992-1997
IEEE Browder J. thompson Memorial Prize Paper Award, 1991
Research is focused on on all aspects of VLSI signal and image processing starting from algorithm and architecture design to design of digital integrated circuits and computer-aided design tools. Our emphasis is on developing techniques to design architectures and algorithms which can be operated with high speed, or lower area or lower power. Different applications impose different speed-power demands on implementations of an identical algorithm. While video and radar applications require high-speed, wireless and personal communications systems applications require low-power implementations. In addition to studying VLSI implementation styles, we also are studying computer arithmetic implementations and design of CAD tools for high-level synthesis of digital signal processing (DSP) systems and for multiprocessor prototyping and task scheduling of software programmable DSP systems using data-flow graph models. Very high-speed architectures are designed based on novel use of look-ahead computations, pipelining and retiming. Recent work has addressed pipelined designs for parallel decision feedback equalizers, Tomlinson-Harashima precoders, Viterbi decoders, linear-feedback shift registers, and multi-gigabit transceivers. Significant research has been directed towards parallel and pipelined implementations of turbo decoders, low-power implementations of low-density parity check codes, and crypto-acclerators. Current research on low-power design is based on implementations using overscaled supply voltage and subthreshold circuit design.
Another area of research is biomedical signal processing and classification. Broad research in this area addresses extracting discriminating features and using them for signal classification using classifiers such as Support Vector Machines. These techniques currently are being applied for seizure prediction and lung sound assessment. VLSI implementations of these systems is also of considerable interest.
See my personal web page for more details.
K.K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, Wiley, NY 1999
K. K. Parhi, “Algorithm Transformation Techniques for Concurrent Processors”. Proceedings of the IEEE Special Issue on Supercomputer Technology, 77.12 (December 1989): 1879-1895.
K. K. Parhi, and D. G. Messerschmitt. “Static Rate-Optimal Scheduling of Iterative Data Flow Programs via Optimum Unfolding”. IEEE Transactions on Computers, 40.2 (February 1991): 178-195.
K. K. Parhi, and T. Nishitani, "VLSI Architectures for Discrete Wavelet Transforms", IEEE Trans. on VLSI Systems, 1(2), June 1993, pp. 191-202
Z. Wang, Z. Chi and K. K. Parhi, "Area-Efficient High Speed Decoding Schemes for Turbo/MAP Decoders", IEEE Trans. on VLSI Systems, 10(12), Dec. 2002
K. K. Parhi, "An Improved Pipelined MSB-First Add-Compare-Select Unit Structure for Viterbi Decoders", IEEE Trans. on Circuits and Systems, Part-I: Regular Papers, 51(3), pp. 504-511, March 2004
Y. Gu and K. K. Parhi, "Design of Parallel Tomlinson-Harashima Precoders", IEEE Trans. Circuits and Systems-II: Express Briefs, 55(5), pp. 447-451, May 2008
X. Zhu, K. K. Parhi, and W. Warwick, “Detecting Changes in Respiratory Patterns in High Frequency Chest Compression Therapy by Single-Channel Blind Source Separation,” Proc. of 2009 IEEE Engineering in Medicine and Biology Conference (EMBC), Minneapolis, Sept. 2009
Y. Park, K. K. Parhi and T. Netoff, “Seizure Prediction Using Cost-Sensitive Support Vector Machine,” Proc. of 2009 IEEE Engineering in Medicine and Biology Conference (EMBC), Minneapolis, Sept. 2009