• 2008
  • 2007
  • 2006
    • J. Gu, R. Harjani, and C. Kim, "Distributed Active Decoupling Capacitors for On-Chip Supply Noise Cancellation in Digital VLSI Circuits", VLSI Circuits Symposium, June 2006 [PAPER] [SLIDES]
    • J. Gu, J. Keane, S. Sapatnekar, and C. Kim, "Width Quantization Aware FinFET Circuit Design", Custom Integrated Circuits Conference (CICC), Sep. 2006 [PAPER] [SLIDES]
    • S. Kumar, C. Kim, and S. Sapatnekar, "An Analytical Model for Negative Bias Temperature Instability", International Conference on Computer Aided Design (ICCAD), Nov. 2006 [PAPER] [SLIDES]
    • J. Keane, T. Kim, H. Eom, S. Sapatnekar, and C. Kim, "Subthreshold Logical Effort: A Systematic Framework for Optimal Subthreshold Device Sizing", Design Automation Conference (DAC), July 2006 [PAPER] [SLIDES]
    • J. Kil, J. Gu, and C. Kim, "A High-Speed Variation-Tolerant Interconnect Technique for Sub-Threshold Circuits Using Capacitive Boosting", International Symposium on Low Power Electronics and Design (ISLPED), Oct. 2006 [PAPER] [SLIDES]
    • T. Kim, H. Eom, J. Keane, and C. Kim, "Utilizing Reverse Short Channel Effect for Optimal Subthreshold Circuit Design", International Symposium on Low Power Electronics and Design (ISLPED), Oct. 2006 [PAPER] [SLIDES]
    • J. Gu, J. Keane, and C. Kim, "Modeling and Analysis of Leakage Induced Damping Effect in Low Voltage LSI's", International Symposium on Low Power Electronics and Design (ISLPED), Oct. 2006 [PAPER] [SLIDES]
    • S. Kumar, C. Kim, and S. Sapatnekar, "Impact of NBTI on SRAM Read Stability and Design for Reliability", International Symposium on Quality Electronics Design (ISQED), Mar. 2006 [PAPER]
    • S. Kumar, C. Kim, and S. Sapatnekar, "Mathematically-Assisted Adaptive Body Bias (ABB) for Temperature Compensation in Gigascale LSI Systems", Asian-Pacific Design Automation Conference (ASP-DAC), Jan. 2006 [PAPER]
    • [Invited] C. H. Kim, J. Kim, I. Chang, and K. Roy, "PVT Aware Leakage Reduction for On-Die Caches Using Self-Decay Scheme", IEEE Journal of Solid-State Circuits, Vol. 41, Issue 1, pp. 170-178, Jan. 2006 [PAPER]
    • [Invited] A. Agarwal, S. Mukhopadhyay, A. Raychowdhury, K. Roy, and C. H. Kim, "Leakage Power Analysis and Reduction for Nanoscale Circuits", IEEE Micro, Vol. 26, Issue 2, pp. 68-80, March-April 2006 [PAPER]
    • H. Suzuki, C.H. Kim, and K. Roy, "Fast Tag Comparator Using Diode Partitioned Domino for 64b Microprocessors", IEEE Trans. on Circuits and Systems I, 2006 [PAPER]
    • C. H. Kim, K. Roy, S. Hsu, A. Alvandpour, R. Krishnamurthy, and S. Borkar, "A Process Variation Compensating Technique with an On-Die Leakage Current Sensor for Nanoscale Dynamic Circuits", IEEE Trans. on VLSI Systems, Vol. 14, No. 6, pp. 646-649, June 2006
  • 2005
    • C. H. Kim, J. Kim, I. Chang and K. Roy, "PVT-Aware Leakage Reduction for On-die Caches with Improved Read Stability", International Solid-State Circuits Conference (ISSCC), Feb. 2005 [PAPER] [SLIDES]
    • I. Chang, K. Kang, S. Mukhopadhyay, C. Kim, and K. Roy, "Fast and Accurate Estimation of Nano-Scaled SRAM Read Failure Probability using Critical Point Sampling", Custom Integrated Circuits Conference (CICC), Sep. 2005 [PAPER]
    • J. Gu and C. H. Kim, "Multi-Level Power Delivery for Supply Noise Reduction and Low Voltage Operation", International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2005 [PAPER]
    • [Invited] C. H. Kim, K. Roy, S. Hsu, R. Krishnamurthy, S. Borkhar, "An On-Die CMOS Leakage Current Sensor For Measuring Process Variation in Sub-90nm Generations", International Conference on IC Design and Technology (ICICDT), May 2005
    • [Invited] C. H. Kim and K. Roy, "Self Calibrating Circuit Design for Variation Tolerant VLSI Systems", International On-Line Testing Symposium (IOLTS), July 2005 [PAPER]
    • K. Kim, C. H. Kim, and K. Roy, "TFT-LCD Application Specific Low Power SRAM Using Charge-Recycling Technique", International Symposium on Quality Electronics Design (ISQED), Mar. 2005 [PAPER]
    • [Invited] A. Agarwal, S. Mukhopadhyay, C. H. Kim, A. Raychowdhury, and K. Roy, "Leakage Power Analysis and Reduction: Models, Estimation and Tools", IEE Proceedings, 152(3), pp. 353-368, May 2005 [PAPER]
    • C. H. Kim, J. Kim, S. Mukhopadhyay, and K. Roy, "A Forward Body-Biased Low-Leakage SRAM Cache: Device, Circuit and Architecture Considerations", IEEE Trans. on VLSI Systems, Vol. 13, No. 3, pp. 349-357, Mar. 2005 [PAPER]
  • 1998-2004
    • C. H. Kim, K. Roy, S. Hsu, R. Krishnamurthy, S. Borkhar, "An On-Die CMOS Leakage Current Sensor For Measuring Process Variation in Sub-90nm Generations", VLSI Circuits Symposium, June 2004 [PAPER] [SLIDES]
    • C. H. Kim, H. Ananthan, J. Kim and K. Roy, "Effectiveness of Using Supply Voltage as Back-Gate Bias in Ground Plane SOI MOSFET's", IEEE SOI Conference, Oct. 2004 [PAPER]
    • H. Ananthan, C. H. Kim, and K. Roy, "Larger-than-Vdd Forward Body Bias for Nanoscale Circuits", '04 International Symposium on Low Power Electronics and Design (ISLPED), Newport Beach, CA [PAPER]
    • [Invited] A. Agarwal, C. H. Kim, S. Mukhopadhyay, and K. Roy, "Leakage in Nanoscale Technologies: Mechanisms, Impact and Design Considerations", Design Automation Conference (DAC), June 2004 [PAPER]
    • K. Roy, C. H. Kim, A. Agarwal, Circuit Techniques for Leakage Reduction, to appear in Low Power Electronics and Design, CRC Press, April 2004
    • C. H. Kim, J. Kim, S. Mukhopadhyay, and K. Roy, "A Forward Body-Biased Low-Leakage SRAM: Device and Architecture Considerations", International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2003 [PAPER]
    • C. H. Kim, K. Roy, S. Hsu, A. Alvandpour, R. Krishnamurthy, S. Borkhar, "A Process Variation Compensating Technique for Sub-90nm Dynamic Circuits", VLSI Circuits Symposium, June 2002 [PAPER] [SLIDES]
    • C. H. Kim, K. Roy, "Dynamic Vth SRAM : A Leakage Tolerant Cache Memory for Low Voltage Microprocessors ", International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2002 [PAPER]
    • C. H. Kim, K. Roy, "Dynamic Vth Scaling Scheme for Active Leakage Reduction ", Design, Automation and Test in Europe, Mar. 2002 [PAPER]
    • H. I. Kim, K. Roy, "Ultra Low-Power DLMS Adaptive Filter For Hearing Aid Applications", International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2001 [PAPER]
    • H. I. Kim, K. K. Ko, H. C. Kim, W. G. Kim, "Development of a Magnetically Suspended Centrifugal Blood Pump Using Optimal Control Theory", IEEE BMES/EMBS Joint Meeting, Oct. 1999
    • H. I. Kim, H. C. Kim, B. W. Yoon, "Automatic Body Temperature Control System for Small Animal Studies Using Dual Mode PI Control", IEEE EMBS, Nov. 1998
    • K. R. Ko, H. I. Kim, H. C. Kim, "Development of Fast & High Precision Thermo Controller using Peltier Device", IEEE EMBS Asia-Pacific Conference on Biomedical Engineering, Sep. 1999
    • H. I. Kim, K. R. Ko, H. C. Kim, W. G. Kim, "Development of an Active Magnetic Bearing System for the Magnetically Suspended Centrifugal Blood Pump", IEEE EMBS Asia-Pacific Conference on Biomedical Engineering, Sep. 1999
    • C. H. Kim, K. Roy, "Ultra Low-Power DLMS Adaptive Filter For Hearing Aid Applications", IEEE Trans. on VLSI Systems, Vol. 11, Issue 6, pp. 1058-1067, Dec. 2003 [PAPER]
    • S. Mukhopadhyay, C. Neau, T. Cakici, A. Agarwal, C. H. Kim, and K. Roy, "Gate Leakage Reduction for Scaled Devices Using Transistor Stacking", IEEE Trans. on VLSI Systems, Vol. 11, Issue 4, pp. 716-730, Aug. 2003 [PAPER]
    • H. I. Kim, H. C. Kim, "Modeling and Control of a Magnetic Bearing System for the Magnetically Suspended Centrifugal Pump", IJAO, Vol.23, no. 10, pp.47-51, 2000 [PAPER]
    • W. G. Kim, C. H. Chung, W. S. Yang, H. I. Kim, Y. N. Park, H. C. Kim, S. H. Kang, "Development of a Centrifugal Pump with Thick Blades", 2000.2 IJAO


    PATENTS
  • C. H. Kim, J. Kim, K. Roy, "A Variation-Tolerant SRAM Leakage Reduction Technique with Improved Read Stability ", pending
  • C. H. Kim, S. Hsu, R. Krishnamurthy, "Current Mirror Based Multi-Channel Leakage Current Monitor Circuit and Method", US 6,844,750 B2, Jan. 18, 2005