Cartman (UMC 0.13μm) T. Kim, J. Liu, J. Keane, and C.H. Kim, "A High-Density Subthreshold SRAM with Data-Independent Bitline Leakage and Virtual Ground Replica Scheme", International Solid-State Circuits Conference (ISSCC), Feb 2007 [PAPER] [SLIDES] J. Gu, H. Eom, and C.H. Kim, "A Switched Decoupling Capacitor Circuit for On-Chip Supply Resonance Damping", VLSI Circuits Symposium, June 2007 [PAPER] [SLIDES] J. Keane, T. Kim, and C.H. Kim, "An On-chip NBTI Sensor for Measuring PMOS Threshold Voltage Degradation", International Symposium on Low Power Electronics and Design (ISLPED), Aug 2007
	Active Decoupling Capacitor (TSMC 0.18μm) J. Gu, R. Harjani, and C. Kim, "Distributed Active Decoupling Capacitors for On-Chip Supply Noise Cancellation in Digital VLSI Circuits, VLSI Circuits Symposium, June 2006 [PAPER] [SLIDES] J. Kil, J. Gu, and C. Kim, "A High-Speed Variation-Tolerant Interconnect Technique for Sub-Threshold Circuits Using Capacitive Boosting", International Symposium on Low Power Electronics and Design (ISLPED), Oct. 2006 [PAPER] [SLIDES]
	16KB SRAM Cache with PVT-Aware Leakage Reduction (TSMC 0.18μm) C. H. Kim, J. Kim, I. Chang and K. Roy, "PVT-Aware Leakage Reduction for On-die Caches with Improved Read Stability", International Solid-State Circuits Conference, Feb. 2005 [PAPER] [SLIDES] C. H. Kim, J. Kim, I. Chang and K. Roy, "PVT-Aware Leakage Reduction for On-die Caches with Improved Read Stability", '06 IEEE Journal of Solid-State Circuits [PAPER]
	An On-chip Leakage Current Monitor (Intel 90nm) C. H. Kim, K. Roy, S. Hsu, R. Krishnamurthy, S. Borkhar, "An On-Die CMOS Leakage Current Sensor For Measuring Process Variation in Sub-90nm Generations", VLSI Circuits Symposium, June 2004 [PAPER] [SLIDES]
	Process Tolerant High Speed Register File (Intel 90nm) C. H. Kim, K. Roy, S. Hsu, A. Alvandpour, R. Krishnamurthy, S. Borkhar, "A Process Variation Compensating Technique for Sub-90nm Dynamic Circuits", VLSI Circuits Symposium, June 2003 [PAPER] [SLIDES]