Chris Hyung-il Kim
Assistant Professor

B.S., 1998, Seoul National University, Seoul, Korea
M.S., 2000, Seoul National University, Seoul, Korea
Ph.D., 2004, Purdue University, West Lafayette, IN

Telephone: (612) 625-3300

E-mail: chriskim@ece.umn.edu
Web Page: http://www.ece.umn.edu/users/chriskim/


My research focuses on the cooperative field of circuit/device and circuit/architecture design for high performance, low power VLSI systems in the nanometer regime. By the year 2014, 2-5 billion transistors with 10-13nm physical gate length will be integrated on a 500-700mm2 chip using a high-volume manufacturing process. Scaling of silicon MOS transistors in the nanometer dimension will continue to trouble designers with issues such as leakage power, statistical variability, power delivery, interconnect, reliability, testing, quantum effects, etc. Yet unknown problems will arise as researchers seek for solutions to continue the historical rate of progress. Numerous research opportunities at all levels of design (circuit, device, architecture, software, system, CAD, assembly, etc) will offer innovative solutions to extend Moore's law beyond 2010.


Selected Publications

"Ultra Low-Power DLMS Adaptive Filter For Hearing Aid Applications", C. H. Kim, K. Roy, IEEE Trans. on VLSI Systems, Vol. 11, Issue 6, pp. 1058-1067, Dec. 2003

"A Process Variation Compensating Technique for Sub-90nm Dynamic Circuits", C. H. Kim, K. Roy, S. Hsu, A. Alvandpour, R. Krishnamurthy, S. Borkhar, 2003 Symposium on VLSI Circuits, Kyoto, Japan

"An On-Die CMOS Leakage Current Sensor For Measuring Process Variation in Sub-90nm Generations", C. H. Kim, K. Roy, S. Hsu, R. Krishnamurthy, S. Borkhar, 2004 Symposium on VLSI Circuits, Honolulu, Hawaii

"Leakage in Nanoscale Technologies: Mechanisms, Impact and Design Considerations", A. Agarwal, C. H. Kim, S. Mukhopadhyay, and K. Roy, 2004 Design Automation Conference, San Diego, CA

"Larger-than-Vdd Forward Body Bias for Sub-0.5V Nanoscale Circuits", H. Ananthan, C. H. Kim, and K. Roy, 2004 International Symposium on Low Power Electronics and Design, Newport Beach, CA