Gerald E. Sobelman
Associate Professor

B.S., 1974, Physics, University of California, Los Angeles
M.S., 1976, Physics, Harvard University
Ph.D., 1979, Physics, Harvard University

Telephone: (612) 625-8041

E-mail: sobelman@ece.umn.edu
Web Page: http://www-mount.ee.umn.edu/~sobelman/


My research activities are in the areas of VLSI design, cryptography and and reconfigurable computing. I am interested in custom circuit design techniques for high-performance systems, including novel circuit configurations and clocking schemes for high speed or low power. I am developing special-purpose chips and hardware/software systems for applications in cryptography, including both secret key and public key ciphers. Of particular interest is the development of flexible implementations that allow one to perform trade-offs between throughput, level of security and power dissipation. I am also interested in all aspects of reconfigurable computing, including applications on existing FPGA chips as well as the design of new types of programmable devices.


Selected Publications

Elliptic Curve Scalar Multiplier Design Using FPGAs, Lijun Gao, Sarvesh Shrivastava and Gerald E. Sobelman, Proceedings, First International Workshop on Cryptographic Hardware and Embedded Systems, Lecture Notes in Computer Science, Vol. 1717, Springer, 1999.

A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor, Lijun Gao, Sarvesh Shrivastava, Hanho Lee and Gerald E. Sobelman, Proceedings, IEEE Symposium on Field-Programmable Custom Computing Machines, 1999.

Digit-Serial Reconfigurable FPGA Logic Block Architecture, Hanho Lee and Gerald E. Sobelman, Proceedings, IEEE Workshop on Signal Processing Systems, pp. 469-478, 1998.

Digit-Serial DSP Library for Optimized FPGA Configuration, Hanho Lee and Gerald E. Sobelman, Proceedings, IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 322-323, 1998.

Low-Power Multiplier Design Using Delayed Evaluation, Gerald E. Sobelman and Donovan L. Raatz, Proceedings, IEEE International Symposium on Circuits and Systems, Vol. 3, pp. 1564-1567, 1995.