Deep-Submicron Low-Power System Design

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Overview

The advent of various wireless communication technologies boosts the tremendous increasing demand for mobile processing devices. Unlike wired devices that are optimized in favor of performance, minimization of power/energy consumption while maintaining a certain level of performance is a critical concern for wireless devices with limited energy capacity. Due to the prevailing use of intensive digital signal process units and communication blocks in mobile devices, their low-power design is very attractive in both academic and commercial area.

Our current research interest is focused on the voltage overscaling (VOS) techniques in DSP and communication system design, such as filters, FFT/IFFT, etc. The VOS is one of the most prominent techniques that can significantly reduce the power consumption at the cost of incurring computational error/noise due to timing violation. This is because as the supply voltage scales the power consumption decreases quadratically while the delay increases linearly. Our research will also be directed to the computational efficient algorithm development for mobile applications.

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