Education

  • B. Tech. (Honors) degree from the Indian Institute of Technology, Kharagpur (India), in 1982.
  • M.S.E.E. degree from the EE Department, University of Pennsylvania, Philadelphia, in 1984.
  • Ph.D. degree from the EECS Department, University of California, Berkeley, in 1988.
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    Brief Biography

    Keshab Parhi has been a faculty member at the Department of Electrical and Computer Engineering at the University of Minnesota since 1988 where he was an Assistant Professor from Oct. 1988-June 1992, Associate Professor from July 1992-June 1995, and has been a Professor since July 1995. Since 2000, He has held the permanent title of "Distinguished McKnight University Professor" awarded by the Graduate School of the University. Since 1997, he has held the title of "Edgar F. Johnson Professor" awarded by the Institute of Technology. He has held short term positions in several industries such as IBM T.J. Watson Research Center (Yorktown Heights, NY), AT&T Bell Laboratories (Holmdel, NJ), and NEC Corporation (Miyamae-Ku, Kawasaki, Japan), where he was a National Science Foundation Japan Fellow, Broadcom Corp., Irvine, CA, and Medtronic Corp., Minneapolis, MN. He has been a visiting Professor at Delft University (The Netherlands) and Lund University (Sweden).

    His research interests include concurrent algorithm and architecture designs for communications, signal and image processing systems, digital integrated circuits, VLSI digital filters, computer arithmetic, finite field arithmetic architectures and their applications in error control coding and cryptography, high-level DSP synthesis, low-power digital systems, and multiprocessor prototyping and task scheduling for programmable software systems. He has published over 400 papers in these areas. He is the author of the text book VLSI Digital Signal Processing Systems: Design and Implementation (Wiley, 1999) and is the co-editor (with T. Nishitani) of the reference book "Digital Signal Processing for Multimedia Systems" (Marcel Dekker, Inc., March 1999). He has coauthored the research monographs Pipelined Adaptive Digital Filters (with Naresh Shanbhag, 1994), Digit-Serial Computation (with Richard Hartley, 1995) and Pipelined Lattice and Wave Digital Recursive Filters (with Jin-Gyun Chung, 1996), all published by Kluwer Academic Publishers.

    He has served on technical program committees of IEEE Conferences such as ASAP, ICASSP, ISCAS, Computer Arithmetic Symp., Great Lakes Symp. on VLSI, workshop on VLSI Signal Processing, SiPS, and Workshop on VLSI in Communications, and of ASP-DAC, IECS and IWISP conferences. He served as Technical Program Cochair of the 1995 IEEE Workshop on VLSI Signal Processing (held in Osaka, Japan) and the 1996 IEEE Int. Conf. on Application-specific Systems, Architectures, and Processors (held in Chicago). He was the general chair of the 2002 IEEE workshop on Signal Processing: Design and Implementation (SIPS-2002). For the calendar years 2004 and 2005, he was the Editor-in-Chief of the IEEE Trans. on Circuits and Systems, Part-I: Regular Papers. He served as an elected member of the Board of Governors of the IEEE Circuits and Systems Society during 2005-2007.

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