Energy Efficient 60GHz Wireless Transceiver Design

Elad Alon, PhD
University of California - Berkeley

In addition to wall-powered applications such as high-definition video streaming, 60GHz CMOS technology opens up the possibility of embedding low-cost, multi-Gb/s transceivers for file transfer and data synchronization into mobile devices such as smart-phones and digital cameras.  However, realizing this scenario requires complete transceiver designs that dissipate ~200mW or less without sacrificing throughput.

As I will describe in the talk, meeting this energy-efficiency challenge may lead to a significant re-thinking of the transceiver's circuit and system architecture.  Most current wireless systems rely on sophisticated digital signal processing and complex modulation schemes, but at multi-Gb/s throughputs the power cost of the data converters, filters, and even the digital computation is simply too high for mobile devices.  Building on the lessons learned by high-speed chip-to-chip link designers, we have instead focused on maximizing energy-efficiency by utilizing simple modulation schemes with broadband mixed-signal circuits performing the majority of the high-speed signal processing.

In order to demonstrate the efficacy of this approach, I will describe an initial 90nm CMOS transceiver design that utilizes this approach to integrate an RF front-end and complete mixed-signal baseband signal path dissipating 170mW/140mW while transmitting/receiving 4-7Gb/s QPSK data at <10-11 BER.  I will then briefly describe some of our on-going work that aims to extend the baseband's capabilities, and will conclude the talk by highlighting some of the key remaining open questions.