Device technology for a pluralistic world of computation

Wilfried Haensch
IBM TJ Watson Research Center, Yorktown Heights, NY

Abstract
In the next decade we will witness the migration of the traditional scaling driven semiconductor industry into the commodity space. Honing manufacturing skills to produce the highest yield at the lowest cost will be the distinguishing factor between the remaining hardware manufactures. Technology innovation for the classical high performance space will not seek brute force improvements in device related computational power but rather focus on moving data more efficiently between system components and make a smarter choice of how to use and build memory. Both aspects are most likely interdependent. Data flow can be reduced if part of the computation is moved into memory, for example, or done remotely at the data source. Data flow can be enhanced if memory is closely integrated into the logic on the other hand. It is conceivable that a highly integrated logic/memory system will need much less administrative oversight from the operating system and can therefore have a much better use of the computational resources which will give a net performance gain. However, even in the case of infinite memory and zero latency traditional CMOS technology will have only limited performance gains. Looking at the emerging workloads it is questionable if traditional CMOS is the best platform for the computational effort. It becomes increasingly important to find structure in big datasets to identify useful information. Typical application spaces will include financial markets, environmental and agricultural forecasting, security evaluations and more. These applications either require model mapping or even model creating from unstructured data to provide predictive projections. For these class of computation a brain inspired approach is believed to perform these new tasks much more efficient than traditional CMOS. At this point it is not clear what the devices are that could be enable these new architectures. Most likely we will see distinctive heterogeneous systems with components that will do some of the tasks much better than CMOS ever can and some other tasks for that the available CMOS is just right. In my presentation I will review the existing device roadmap and touch on some of the device ideas that could enable technologies for a variety of applications.

Bio Sketch
Wilfried Haensch received his Ph.D. in 1981 from the Technical University of Berlin, Germany in the field of theoretical solid state physics. He started his career in Si technology 1984 at SIEMENS corporate research Munich. There he worked on high field transport in MOSFETs.  From 1990 to 2001 he worked on various aspects in DRAM technology. This covered the development of the quarter micron 64M generation to the manufacturing of the 256M at the 110nm node at INFINEON’s manufacturing site in Richmond VA.  In 2001 he joined the IBM TJ Watson Research Center to lead a group for novel devices and applications. In this function he was responsible for the exploration of device concepts for future technology nodes and new concepts for memory and logic circuits, including 3D integration. He is currently responsible for post CMOS device solution and Si technology extensions. This includes carbon electronics for RF and digital applications, optical and electrical material properties of graphene and carbon nano tubes and CMOS integrated Si nano-photonics.  He is the author of a text book on transport physics and author/co-author of more than 100 publications. He was awarded the Otto Hahn Medal for outstanding Research in 1983. He was named IEEE Fellow in 2012.